Altering sample makefile to support multiple source files

[rgl]

I've been using one of the samples as a starting point for my project. I need to expand to multiple source files and I need to change the Makefile. I want to use the makefile included with the SDK so all of its dependencies are included in the build, but all of the samples are based on a single source file. How do I add a new target to the existing makefile that has multiple source files? I have only ever created simple makefiles with pretty straightforward dependencies. This makefile has stuff in it that I don't understand well, like automatic variables.

[jliu]

Add your source file to ALL_C_COMPILE_SOURCES in the Makefile.

[rgl]

I don't understand how this will do what I want.

I want to create a new target called, let's say, myproject.

It consists of three source files: source1.c, source2.c and source3.c
(as well as the Evolution SDK libraries, etc.)

If I just add the three source files to ALL_C_COMPILE_SOURCES how will that cause the tools to build myproject.out, mypriject.romz, etc?

Don't I need a new rule to associate these specific three source files with the target?

[joshjack]

Might I suggest that you stick with a built-in configuration and just use #include to pull your source files together? That works fine for me.

[mattmc]

Hi Bob,

I can try to explain a few things, but you will need to learn about working with make files via a good book or something.

I want to create a new target called, let's say, myproject.

It consists of three source files: source1.c, source2.c and source3.c
(as well as the Evolution SDK libraries, etc.)

If I just add the three source files to ALL_C_COMPILE_SOURCES how will that cause the tools to build myproject.out, mypriject.romz, etc?

Don't I need a new rule to associate these specific three source files with the target?

The way the sample Makefile is setup is that it will compile the target c source file and everything listed in ALL_C_COMPILE_SOURCES.

The ALL_C_COMPILE_SOURCES macro is made up of two additional macros, SDK_CS and SAMPLE_CS. So you can add additional source files to any of these macros. As was suggested, the easiest is probably ALL_C_COMPILE_SOURCES. Just add the new c files to the macro. It should look something like this:

ALL_C_COMPILE_SOURCES = \
   $(SDK_CS_                     \
   $(SAMPLE_CS)                \
   source1.c                      \
   source2.c

Note that the back slash (\) tells make that these are all on the same line. A newline has significance in a makefile.

To get the the output to be named "myproject", the simplest way, using the existing makefile, is to create a c source file named "myproject.c", and have that be the target in the all: rule.

mattmc

[rgl]

Matt,

Thanks for your patience. I had a crash course in makefiles yesterday, but I'll need to study more to get all the subtleties.

I already added a new C file with my project's name to the list of targets:

# Defintion of the sample make targets.
.PHONY:
aestunnelclient aestunnelserver cgi commandline cpio custommib \
email helloworld lab1 lab2 lab3 lab4 lab5 lab6 lab7 lab8 lab9 lab10 readconfig \
sockets sshclient sshserver sslclient sslserver tftpsample thread tunneler wiportdemo wlan \
xmlconfig m3_sample1: mkdirs $(TARGET).romz

Now when I do a cs-make m3_sample1 I get a build with that name, which is what I wanted. So I just add the rest of my c files to ALL_C_COMPILE_SOURCES and they all get compiled and linked with it. That's pretty simple.

One of the things that really threw me was the variable MAKECMDGOALS. I could infer that it was being loaded with the target specified in the command line, but I didn't come across it in any of my reading. I guess I just didn't read far enough!

Again, thanks for your help.

- Bob